Sam

@rk@mastodon.well.com @joe@f.duriansoftware.com GET /.well-known/updog

@steve@discuss.systems @whitequark@social.treehouse.systems did the previous owners? i guess sorta?

@lzg@mastodon.social lena hours are used more quickly between 9-5

@pigworker one of my big worries about LLMs is there's no pressure to reduce boilerplate. I hope you can provide that mechanism again. Yes I write C++ every day, how can you tell?

@pigworker@types.pl slepper is one who carries things, and slupper is the meal between lunch and supper.

@pervognsen Nothing was sacred. It's now more sacred than it was. Though I think AMDGPU? wants to read (but not modify) the string for scheduling hints/annotations.

@TomF@mastodon.gamedev.place this has four seats, if you fold open the back! It only has three forward gears with cast chasms between them so i hate to think how slow it would be with four.

@TomF@mastodon.gamedev.place it would be if it was reliable and could get up any hills

@TomF@mastodon.gamedev.place nope, a Triumph :) Some Austin 7s were Big but none Super.

@fay59@tech.lgbt brave

@thesamesam I'm not super familiar with how thin lto is orchestrated. I think that while there are separate threads, they can pull known definitions into partitions based on need, so controlling number of threads doesn't help much. I'm not sure though.

@thesamesam ThinLTO in LLVM does some partitioning. Full LTO does a single Partition. Unified I think can do either.

@ionchy high fiber cereal

@dan genuinely surprised this isn't Zach

@regehr@mastodon.social i mostly get this and then i have a good week where i remember… and buy eggs or whatever every time i visit a grocery store and end up with waaaaay too many

@jneen@unstable.systems alright there pterry

@wilbowma it doesn't help that the bib info from the ACM DL is 💩

@zwarich @pervognsen risc-v will do things like rewrite registers in instructions, delete instructions, rewrite them with a smaller variant, etc etc etc. Now remember that alignment needs to be preserved and enjoy your headache.

@onpaperwings let's say there are 9 shelves in the stack: all 9 of them filled for 40 feet.

@regehr@mastodon.social one worry I would have about this is whether using a reducer is "reasonable". I know it's "needed" for humans to analyse the problems, but I don't know if the claude compiler has a compositional enough structure that big programs hit the same problems small programs do (I know clang etc *do* have this structure but that's because they were written by humans). This feels like some opposite to the "small model theory" we get in program synthesis for working out which candidates are likely to be most general. I guess that's easy to verify by checking all the pre-shrinking cases are fixed by the fixes to the reduced bugs, and maybe against all the intermediate shrunk programs.

@sunfish I haven't tried the transformation shown in this paper combined with LTO (which does cross-module inlining), but it seems best to just hide the accesses behind calls anyway.

@sunfish *especially* as you end up needing a volatile kind of memcpy for some kinds of MMIO buffer accesses, which is very easy for C compilers to mess with in unforseen ways.

@edwinb plenty of time for mischief and high jinks. Care to disclose any plans?

@pervognsen I don't have data to back this up but I presume this exact inline asm string in the x86 callback was in a core header/library somewhere, called from a hot loop, and this made a specific benchmark faster on a machine that had a better core than the header presumed.

@zwarich @pervognsen let me introduce you to RISC-V Linker Relaxations, which both inspect and modify machine code bytes to change the sequence to better ones (they still use relocations)

@dev@discuss.systems god american drivers are such trash. In the UK you don't move until the lights stop flashing, regardless of the barriers, so they can put the barriers down again without turning them off.

@meowray@hachyderm.io I'm not sure that "Recommendation for future architectures" is entirely correct. Let's say I have two instructions, one that's some kind of "jump and set return address", and a similar one that doesn't set the return address (otherwise identical layout for the pc-relative operand). Yes, the one that sets the return address is allowed to use the PLT (but doesn't have to), so a CALL relocation is reasonable for this instruction, and for tail calls that use the instruction that doesn't set the return address. BUT this doesn't address that you can use the non-return-address-setting instruction for jumps within a function, where the PLT-clobbered registers may still be live. So you still end up with two relocations (a Call relocation and a Jump relocation) that are very similar, just the call relocation is allowed to use the PLT if it feels like it, and the Jump is not.

@TomF@mastodon.gamedev.place "Super Seven" is two different cars and only one would be seen at a track day. I own the other

@mwichary@mastodon.online oooh is this reusing pin matrices that also got used on synths? What are they originally for?

@JamesWidman@mastodon.social @zygoloid@hachyderm.io I don't think he's saying the signed integer type doesn't exist, just that it cannot represent 0.

@bentnib@types.pl but what color are they?

@pigworker@types.pl OED claims slep is a noun, an archaic term for to sleep. That's not interesting enough either.